interrupt.h File Reference

#include <stdbool.h>
#include <stdint.h>

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Classes
struct	gp_registers
struct	intr_frame

Typedefs
typedef void	intr_handler_func(struct intr_frame *)

Enumerations
enum	intr_level { INTR_OFF , INTR_ON }

Functions
enum intr_level	intr_get_level (void)
enum intr_level	intr_set_level (enum intr_level)
enum intr_level	intr_enable (void)
enum intr_level	intr_disable (void)
struct gp_registers	__attribute__ ((packed))
void	intr_init (void)
void	intr_register_ext (uint8_t vec, intr_handler_func *, const char *name)
void	intr_register_int (uint8_t vec, int dpl, enum intr_level, intr_handler_func *, const char *name)
bool	intr_context (void)
void	intr_yield_on_return (void)
void	intr_dump_frame (const struct intr_frame *)
const char *	intr_name (uint8_t vec)

Variables
uint64_t	r15
uint64_t	r14
uint64_t	r13
uint64_t	r12
uint64_t	r11
uint64_t	r10
uint64_t	r9
uint64_t	r8
uint64_t	rsi
uint64_t	rdi
uint64_t	rbp
uint64_t	rdx
uint64_t	rcx
uint64_t	rbx
uint64_t	rax
struct gp_registers	R
uint16_t	es
uint16_t	__pad1
uint32_t	__pad2
uint16_t	ds
uint16_t	__pad3
uint32_t	__pad4
uint64_t	vec_no
uint64_t	error_code
uintptr_t	rip
uint16_t	cs
uint16_t	__pad5
uint32_t	__pad6
uint64_t	eflags
uintptr_t	rsp
uint16_t	ss
uint16_t	__pad7
uint32_t	__pad8

Typedef Documentation

intr_handler_func

typedef void intr_handler_func(struct intr_frame *)

Enumeration Type Documentation

intr_level

enum intr_level

Enumerator
INTR_OFF
INTR_ON

                {
    INTR_OFF,             /* Interrupts disabled. */
    INTR_ON               /* Interrupts enabled. */
};

Function Documentation

__attribute__()

struct intr_frame __attribute__

(

(packed)

)

intr_context()

bool intr_context

(

void

)

                    {
    return in_external_intr;
}

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intr_disable()

enum intr_level intr_disable

(

void

)

                    {
    enum intr_level old_level = intr_get_level ();
 
    /* Disable interrupts by clearing the interrupt flag.
       See [IA32-v2b] "CLI" and [IA32-v3a] 5.8.1 "Masking Maskable
       Hardware Interrupts". */
    asm volatile ("cli" : : : "memory");
 
    return old_level;
}

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intr_dump_frame()

void intr_dump_frame

(

const struct intr_frame *

f

)

                                             {
    /* CR2 is the linear address of the last page fault.
       See [IA32-v2a] "MOV--Move to/from Control Registers" and
       [IA32-v3a] 5.14 "Interrupt 14--Page Fault Exception
       (#PF)". */
    uint64_t cr2 = rcr2();
    printf ("Interrupt %#04llx (%s) at rip=%llx\n",
            f->vec_no, intr_names[f->vec_no], f->rip);
    printf (" cr2=%016llx error=%16llx\n", cr2, f->error_code);
    printf ("rax %016llx rbx %016llx rcx %016llx rdx %016llx\n",
            f->R.rax, f->R.rbx, f->R.rcx, f->R.rdx);
    printf ("rsp %016llx rbp %016llx rsi %016llx rdi %016llx\n",
            f->rsp, f->R.rbp, f->R.rsi, f->R.rdi);
    printf ("rip %016llx r8 %016llx  r9 %016llx r10 %016llx\n",
            f->rip, f->R.r8, f->R.r9, f->R.r10);
    printf ("r11 %016llx r12 %016llx r13 %016llx r14 %016llx\n",
            f->R.r11, f->R.r12, f->R.r13, f->R.r14);
    printf ("r15 %016llx rflags %08llx\n", f->R.r15, f->eflags);
    printf ("es: %04x ds: %04x cs: %04x ss: %04x\n",
            f->es, f->ds, f->cs, f->ss);
}

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intr_enable()

enum intr_level intr_enable

(

void

)

                   {
    enum intr_level old_level = intr_get_level ();
    ASSERT (!intr_context ());
 
    /* Enable interrupts by setting the interrupt flag.
 
       See [IA32-v2b] "STI" and [IA32-v3a] 5.8.1 "Masking Maskable
       Hardware Interrupts". */
    asm volatile ("sti");
 
    return old_level;
}

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intr_get_level()

enum intr_level intr_get_level

(

void

)

                      {
    uint64_t flags;
 
    /* Push the flags register on the processor stack, then pop the
       value off the stack into `flags'.  See [IA32-v2b] "PUSHF"
       and "POP" and [IA32-v3a] 5.8.1 "Masking Maskable Hardware
       Interrupts". */
    asm volatile ("pushfq; popq %0" : "=g" (flags));
 
    return flags & FLAG_IF ? INTR_ON : INTR_OFF;
}

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intr_init()

void intr_init

(

void

)

                 {
    int i;
 
    /* Initialize interrupt controller. */
    pic_init ();
 
    /* Initialize IDT. */
    for (i = 0; i < INTR_CNT; i++) {
        make_intr_gate(&idt[i], intr_stubs[i], 0);
        intr_names[i] = "unknown";
    }
 
#ifdef USERPROG
    /* Load TSS. */
    ltr (SEL_TSS);
#endif
 
    /* Load IDT register. */
    lidt(&idt_desc);
 
    /* Initialize intr_names. */
    intr_names[0] = "#DE Divide Error";
    intr_names[1] = "#DB Debug Exception";
    intr_names[2] = "NMI Interrupt";
    intr_names[3] = "#BP Breakpoint Exception";
    intr_names[4] = "#OF Overflow Exception";
    intr_names[5] = "#BR BOUND Range Exceeded Exception";
    intr_names[6] = "#UD Invalid Opcode Exception";
    intr_names[7] = "#NM Device Not Available Exception";
    intr_names[8] = "#DF Double Fault Exception";
    intr_names[9] = "Coprocessor Segment Overrun";
    intr_names[10] = "#TS Invalid TSS Exception";
    intr_names[11] = "#NP Segment Not Present";
    intr_names[12] = "#SS Stack Fault Exception";
    intr_names[13] = "#GP General Protection Exception";
    intr_names[14] = "#PF Page-Fault Exception";
    intr_names[16] = "#MF x87 FPU Floating-Point Error";
    intr_names[17] = "#AC Alignment Check Exception";
    intr_names[18] = "#MC Machine-Check Exception";
    intr_names[19] = "#XF SIMD Floating-Point Exception";
}

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intr_name()

const char * intr_name

(

uint8_t

vec

)

                        {
    return intr_names[vec];
}

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intr_register_ext()

void intr_register_ext	(	uint8_t	vec,
		intr_handler_func *	handler,
		const char *	name
	)

                          {
    ASSERT (vec_no >= 0x20 && vec_no <= 0x2f);
    register_handler (vec_no, 0, INTR_OFF, handler, name);
}

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intr_register_int()

void intr_register_int	(	uint8_t	vec,
		int	dpl,
		enum	intr_level,
		intr_handler_func *	handler,
		const char *	name
	)

{
    ASSERT (vec_no < 0x20 || vec_no > 0x2f);
    register_handler (vec_no, dpl, level, handler, name);
}

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intr_set_level()

enum intr_level intr_set_level

(

enum

intr_level

)

                                       {
    return level == INTR_ON ? intr_enable () : intr_disable ();
}

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intr_yield_on_return()

void intr_yield_on_return

(

void

)

                            {
    ASSERT (intr_context ());
    yield_on_return = true;
}

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Variable Documentation

__pad1

uint16_t __pad1

__pad2

uint32_t __pad2

__pad3

uint16_t __pad3

__pad4

uint32_t __pad4

__pad5

uint16_t __pad5

__pad6

uint32_t __pad6

__pad7

uint16_t __pad7

__pad8

uint32_t __pad8

cs

uint16_t cs

ds

uint16_t ds

eflags

uint64_t eflags

error_code

uint64_t error_code

es

uint16_t es

R

struct gp_registers R

r10

uint64_t r10

r11

uint64_t r11

r12

uint64_t r12

r13

uint64_t r13

r14

uint64_t r14

r15

uint64_t r15

r8

uint64_t r8

r9

uint64_t r9

rax

uint64_t rax

rbp

uint64_t rbp

rbx

uint64_t rbx

rcx

uint64_t rcx

rdi

uint64_t rdi

rdx

uint64_t rdx

rip

uintptr_t rip

rsi

uint64_t rsi

rsp

uintptr_t rsp

ss

uint16_t ss

vec_no

uint64_t vec_no